1. Field of the Invention
The present invention relates to a method for producing a non-monocrystalline semiconductor device adapted for use in a photoelectric converting device such as a solar cell, a line sensor or an area sensor, a thin film transistor (TFT) for the liquid crystal display or the like, more particularly a non-monocrystalline semiconductor device formed by successive laminations of plural thin semiconductor films, and an apparatus for executing the method.
2. Related Background Art
Non-monocrystalline thin semiconductor films, particularly those of non-monocrystalline silicon and compounds thereof, are frequently used in photoelectric converting devices of a large area such as solar cell or line sensor, and in this film transistors of the liquid crystal displays, since such thin films can be prepared at a low temperature and show strong light absorption in the visible region.
These devices, as exemplified by solar cells, generally have a laminated structure of two or more thin semiconductor films, such as the PIN structure, in order to attain their functions. For producing such devices, there is generally employed an apparatus of load-look system in which films can be continuously formed without breaking vacuum state after the substrate is loaded. Such load-lock apparatus is capable of forming different layers in independent vacuum chambers, and is effective in improving the device performance in terms of impurity reduction in each layer.
For producing the non-monocrystalline thin semiconductor film, there have been various methods such as plasma CVD, photo CVD, thermal CVD, sputtering and vacuum evaporation, but plasma CVD has principally been employed since it can provide a relatively high film quality and can easily provide a film of a large area. Plasma CVD consists of film deposition on a substrate, by decomposing raw material gas with a high frequency field or microwave thereby generating a deposition precursor. Among the plasma CVD methods, most popularly utilized is the capacitance-coupled high frequency plasma CVD employing a high frequency power of 13.56 MHz as the excitation source.
FIG. 5 is a schematic view of a conventional capacitance-coupled high frequency plasma CVD apparatus of load-lock system employed for producing a PIN device.
The apparatus 500 is provided with a loading chamber 502; an N-layer forming chamber 503 connected to said loading chamber 502 through a first gate valve 511; an I-layer forming chamber 504 connected to said N-layer forming chamber 503 through a second gate valve 512; a P-layer forming chamber 505 connected to said I-layer forming chamber 503 through a third gate valve 513; and an unloading chamber 506 connected to said P-layer forming chamber 505 through a fourth gate valve 514. Thus, said apparatus 500 is a multi-chamber system with five chambers in total, in which the N-layer forming chamber 503, the I-layer forming chamber 504 and the P-layer forming chamber 505, being mutually connected through the gate valves 512, 513, are made independent in terms of vacuum level.
Said capacitance-coupled high frequency plasma CVD apparatus 500 is utilized in the following manner, in the preparation of a device with PIN structure.
At first a substrate 520 is set on a substrate holder 521, which is placed on rails 507 and loaded in the loading chamber 502. Then the interior of the loading chamber 502 is evacuated to a predetermined pressure, and the substrate 520 is heated to a predetermined temperature. Subsequently the substrate holder 521 is transferred into the N-layer forming chamber 503 by opening the first gate valve 511, which is thereafter closed.
Then the substrate 520 is heated to a predetermined temperature by a first heater (not shown) provided in the N-layer forming chamber 503. First raw material gas 525 is introduced into the N-layer forming chamber 503, and a first high frequency source 551 is turned on to apply a high frequency power to a first high frequency electrode 541, thereby generating plasma in the N-layer forming chamber 503 and effecting the formation of an N-layer. After the completion of film formation, said first high frequency source 551 is turned off, and the introduction of first raw material gas 525 into the N-layer forming chamber 503 is terminated.
Subsequently the interior of the N-layer forming chamber 503 is evacuated, and the substrate holder 521 is transferred to the I-layer forming chamber 504 by opening the second gate valve 512. Then an I-layer is formed with second raw material gas 526, in a procedure similar to that for N-layer formation. Then the interior of the I-layer forming chamber 504 is evacuated, and the substrate holder 521 is transferred to the P-layer forming chamber 505 by opening the third gate valve 513. A P-layer is formed with third raw material gas 527, in a procedure similar to that for N-layer formation. Then the interior of the P-layer forming chamber 505 is evacuated, and the substrate holder 521 is transferred to the unloading chamber 506 by opening the fourth gate valve 514. Finally air is introduced into the unloading chamber 506, and the substrate holder 521 is taken out from said unloading chamber 506.
The N-, I- and P-layers can be formed in succession on the substrate 520 in the above-explained manner. Other devices can also be formed in a similar manner by suitably varying the species of raw material gasses and the number of film forming chambers.
In the capacitance-coupled high frequency plasma CVD apparatus 500, electrically grounded first to third shields 531-533 are respectively provided around the first to third high frequency electrodes 541-543, for avoiding dispersion of discharge.
However, in the film formation utilizing the above-explained plasma CVD apparatus 500, the plasma has to be interrupted between successive film formations. The present inventors have found that this fact creates a plasma on/off hysteresis at the interface of the semiconductor layer, eventually affecting the device characteristics.
More specifically, such plasma CVD apparatus causes plasma damage on the interface by the initial plasma. The initial plasma means the plasma generated from the moment of activation of the excitation source to the stationary state, and induces a damage in the underlying film, thus generating defects in the interface. Also the newly deposited film shows deteriorated interface characteristics, as the initially deposited part of said film, constituting the interface region, is formed by such initial plasma state. There are also reports that impurities such as oxygen, carbon and nitrogen tend to deposit mainly at the interface, and such phenomenon results from the producing method explained above.
The device characteristics are significantly affected by such interface. For example, the amorphous silicon thin film transistor can be prepared by consecutive depositions in the order of an insulating film and an amorphous silicon film, or in the order of an amorphous silicon film and an insulating film, but the electrical properties and reliability of the device are considered generally superior in the former process. This is because the device characteristics are governed by the characteristics of the interface between the amorphous silicon and the insulating film, as the channel for the carriers is formed in a part of said amorphous silicon, close to said interface. More specifically, in the latter process, the device characteristics are deteriorated by the plasma damage induced in the surface of the amorphous silicon, constituting the channel of the thin film transistor, at the formation of insulating film on the amorphous silicon. However, even in the former process, the inherent film characteristics are not fully exploited because the channel is formed in the amorphous silicon deposited by the initial plasma.
Also in the photoelectric converting devices, the gain and the photoresponse are affected by the interface characteristics.